专利摘要:

公开号:SE0802663A1
申请号:SE0802663
申请日:2008-12-23
公开日:2010-06-24
发明作者:Thorbjoern Ebefors;Edvard Kaelvesten;Niklas Svedin;Peter Aagren
申请人:Silex Microsystems Ab;
IPC主号:
专利说明:

Here, the term "via" is used for any structure that extends through a disk and is capable of transmitting electrical signals. Vior can be manufactured in many different ways and have many different constructions. For example, a via may be a metal plug surrounded by an insulating material or it may be a doped or non-doped semiconductor plug surrounded by an insulating material. The via plugs can have different cross-sections, i.e. circular, rectangular, square or organ bound, although in most cases circular cross-sections are preferred.
Routing by means In Fig. 1, a first aspect of the invention is thus schematically (not to scale) shown, namely a mirror structure in a mirror array, which has routing elements according to the invention.
The mirrors 1 and 2 are mounted on a support column 3 via threaded structures 4 and 5, respectively, manufactured by means of MEMS techniques in a substrate plate SW. Under each mirror there are actuating electrodes 6, 7 which will cause the mirrors 1 and 2 to deflect when the electrode 6,7 is activated with energy.
In devices according to the prior art, the electrodes are routed "away" from the array by means of electrical wires 8, 9 arranged on the substrate surface (indicated by a dashed line contour in Figure 1). As can be seen, the wire 8 from the electrode 6 for actuating the mirror 1 must pass under the mirror 2, and when it is activated with energy it will also affect the mirror 2 to a certain extent which causes functional errors. In accordance with the invention the disk SW and connected to routing wires 12, 13 on the back of the disk SW. The routing lines 12, 13 are of course arranged next to each other, suitably parallel to the periphery of the disc where wire bonding 14 can be provided if desired. Alternatively, a double layer of metal 10 could be provided on the back with an insulating layer between the conductive layers. In this way, it would be possible to avoid intersecting conductors and thereby increase the ibil flexibility in the routing structures. By plating (or any other suitable method known to those skilled in the art) contact bumps can be provided. Preferably so-called Under Bump Metallization (UBM), which enables fl ip chip mounting of the mirror component. Control circuits, e.g. ASICs can then be mounted directly on the back of the mirror component. For larger mirror arrays, e.g. > 12 x 12, such a solution is more cost effective than conventional prior art wire bonding. Flip-chip mounting is not possible without the via technology.
Method of manufacturing micro mirrors In a process for manufacturing deflectable micro mirrors and / or arrays of such mirrors, two disks are bonded together in one step in such a process before the actual mirror structure is manufactured (a first disk and a second disk), in a controlled atmosphere. for example vacuum. One of the discs (first disc) then has a recess formed therein to provide a necessary space in the final structure for the deflectable mirrors to be able to move freely during deflection. The second disc (preferably an SOI disc) provides a "lid" over the recess.
Thus, after the disks are bonded together, the recess in the first disk will be sealed by the second disk and thus a cavity with a controlled atmosphere (eg vacuum) is created. In subsequent steps in the process, machining of the second disk is performed to fabricate the final mirror structures. The mirror structures comprise an actual mirror part which is relatively thick and rigid and a hinge part.
However, the mirror can have different thicknesses to provide different resonant frequencies - thick mirror means large mass and low frequency; thin mirror means small mass and high frequency. The frequency requirements may be opposite to the flatness requirements. Thinner mirrors can be bent more easily due to mechanical impact.
It is possible to manufacture a mirror with a rigid frame part and the remaining areas thinned to provide low mass and higher rigidity. The hinges can also be thinned to varying degrees.
The hinge will be substantially thinner than the mirror in some embodiments, to provide the required flexibility of the hinge to function as desired. In particular, the hinge can be arranged as a so-called gimbal structure.
In other cases, e.g. however, when a torsional effect is desired, the hinge may have the same thickness as the mirror, but it will then have a lateral extent (i.e. in the transverse direction of the hinge) which is relatively small.
Manufacture of these structures is performed by appropriate masking and etching of the second board. However, the process steps for manufacturing the mirror structures are performed in an atmosphere having a different pressure (normal pressure) than the pressure prevailing inside the cavity. Thus, since there will be a pressure difference across the "lid" when the etching process "breaks through" the SOI board to provide the freely hanging hinged mirrors, there will thus be a sudden pressure equalization. This pressure equalization produces strong forces so that the fragile hinge structures on the mirrors very easily break and the mirrors fall out of the devices, with extremely low yields as a result.
According to the invention, controlled ventilation of the structure is provided so that the pressure equalization will be very soft and no strong forces will be exerted on the delicate hinges.
The solution according to an embodiment of the invention is shown schematically in Figures 2a-d.
Fig. 2a shows a first disk 20 (substrate disk) having a recess 21 formed therein, bonded to an SOI disk 22 comprising a component layer 23, an oxide layer 24 and a support layer 25. In the component layer 23 of the second disk 23 suitably, a thinned portion 23 'has been made to define the thickness of a hinge 28 (see Fig. 2c) which is to connect the mirror to the supporting structures of the final product.
The carrier layer 25 is removed and after appropriate masking MV a first etching is performed to provide a vent hole precursor structure 26 in the remainder of the component layer 23. This precursor structure is essentially a heel or groove having a predefined depth, i.e. extending downward into the component bearing.
Thereafter, suitable masking MMH is provided to define the mirror 27 and its hinge structures 28 and a second etching is performed. This is schematically illustrated in Fig. 2c. Thereby, the ventilation assist precursor structure 26 will open up the cavity 21 with controlled atmosphere (e.g. vacuum) before the etching has removed so much material from the component bearing that the hinge structure has become so thin that it could be broken due to the forces exerted when the pressure is equalized through the vent hole.
The etching is continued until the mirror 27 is free-etched and the hinges 28 are made. The mirrors can be free-etched in the same process step as the hinges are manufactured by dimensioning the surfaces on which the etching acts to control the etching speed. Thus, the etching will be broken through in the grooves that define the mirror before the etching has penetrated too deep into the grooves that define the hinge.
In an alternative embodiment, the whole process can be performed in one step. This is possible by dimensioning the vent hole precursor structure 26 so that it is large enough for the etching to cut material therein at a faster speed than in the groove defining the mirror, which in turn will be etched faster than the hinges, as in the previous embodiment. This is shown schematically in Fig. 2d, which shows a larger ventilation hole 26 than in Fig. 2c. This invention relates to MEMS devices in which it is desirable to provide electrical potential including ground potential at desired locations in a layered structure.
Referring to Fig. 5a, there is schematically shown a layered structure comprising three (first, second and third, respectively) layers 30, 31 and 32 of, for example, silicon or other semiconducting or conductive material, and between these layers a first insulating layer 33 and a second insulating layer 34. This layered structure is suitably made of two SOI disks which have been bonded together, the first conductive layer 30 constituting the carrier layer and the second conductive layer 31 constituting the component layer of a first SOI disk.
The third conductive layer is the component layer of a second SOI disk. Thus, as will be appreciated, the structure shown in Fig. 5a can be achieved by bonding the two SOI disks and removing the carrier layer from the second SOI disk.
There is also provided a vias structure 35 extending as through the first conductive layer 30. The vias structure may comprise heavily doped Si surrounded by an insulating enclosure 36 so as to provide electrical insulation from the surrounding conductive first layer 30. Other materials such as metal may also used for vian.
For MEMS applications in which this type of layered structure is frequently used, it is often desirable to apply electrical potential to selected layers, and sometimes at selected points or areas in such layers.
According to the invention, a flexible method is provided for tailoring such applications of electrical potential to the need which exists. Thus, the invention provides a method of manufacturing an electrical connection into desired layers in a layer structure and at the same time preventing electrical connection to adjacent layers.
With reference to fi g. 3b, shows there how in a first step a hole 37 is etched through the third and the second conductive layer 32 and 31, and thus also through the insulating layer 34, as well as through the insulating layer 33, and a short distance into the via plug 35 The hole 37 is filled with polysilicon to provide conductivity. The invention does not limit the choice of material to polysilicon, although this is preferred. Any metal or conductive material could be used. Poly-silicon is preferred due to that it has very similar thermal expansion properties to silicon. Excessive differences in expansion properties could lead to mechanical stress that could "dent" the mirror. As shown in Fig. 3b, if a potential is applied to the vane 35, this potential will be transferred to both the second 31 and the third 32 layers.
However, in a first embodiment of the invention, illustrated in Fig. 3c, electrical potential is provided through the vane 35 and into the third conductive layer 32 only. To accomplish this, the first SOI disk has been processed before being bonded to the second SOI disk. Namely, there must be an insulating enclosure 38 surrounding the part of the disc where the polysilicon plug will extend through the second layer 31 in the layered structure.
This is accomplished by etching a trench 38 in a closed loop in the component layer of the first SOI wafer down to the buried oxide layer, and filling the trench at least partially with oxide. On the other hand, the trenches could be left as they are, filled with air, if they are wide enough so that no "ash-over" can occur. Once the two SOI disks have been bonded together and the carrier layer in the second SOI disk has been removed, the procedure discussed with reference to Fig. 3b is performed, a polysilicon plug 37 is provided by the layered structure, and the result shown in Figs. 3c will be obtained. If an electric potential is applied to the wire in this structure, the potential will be transferred to the third layer 32 without affecting the second layer.
To eliminate the risk of damaging the mirror surface while filling the holes with polysilicon, which requires removal of polysilicon from the mirrors, you can mechanically grind away most of the carrier layer and leave only a thin layer. The holes are then made by lithography and etching and filled with polysilicon. This structure, i.e. from bottom to top: mirror - carrier layer residue - polysilicon, then subjected to etching until the mirror is exposed. The poly-silicon "plugs" can be manufactured so that they exhibit low resistivity by suitable doping, with processes well known to those skilled in the art.
On the other hand, if it is desired to provide a potential selectively to the second layer 31, again a trench 38 is made by etching, but in this case it will be done after the SOI disks have been bonded together and the carrier layer has been removed from the second SOI disk. . Thus, the trench 38 is made in the third layer 32, and again, as in the embodiments of Fig. Se, is at least partially filled with insulating material. Even in this case, it is possible to leave the trenches unfilled. Then, a hole 37 is etched through the layered structure, as described with reference to Fig. 3b, and the resulting structure is shown in Fig. Sd. Here, an applied potential will be transferred to only the second layer 31 and leave the third layer unaffected.
In the embodiments shown, it has been shown how the applied potential is transferred to entire layers. However, the principle can also be used to route signals or electrical potential locally within layers. For example, if the applied potential is to be used for actuation purposes at a specific location within a layer, insulating trenches could be provided which form routing "channels" within the layer in question, so that the wire can be located at any desired point on the disk and signals routed to another point. This is exemplified in Fig. 3c, where such a routing "channel" is shown schematically at 39. Of course, the principle according to the method is equally applicable if there are only two layers in the structure.
Actuation of deflectable structures In devices comprising deflectable structures, such as micromirrors in projectors, fiber optic switches, optical amplifiers, etc., one of the desired features is to make it possible to control deflection of the structures.
Below, reference will be made to mirrors even if the principles are applicable to any deflectable structures, such as speaker elements, etc.
There are a number of different ways available to achieve the desired controlled deflection. First and foremost, there must be some kind of "hinge" structure to which the mirrors are connected. Such a structure is illustrated above with reference to Fig. 1, and thus the mirror is mounted on a support structure via a leg or an arm which has a substantially smaller dimension in cross section so as to provide e.g. a torsional deflection.
Another type of threaded structure is a so-called gimbal structure. A gimbal is a rotatably suspended support structure that allows rotation of an object about a single axis. A set of two gimbals, one mounted on the other with the pivot axes perpendicular, can be used to allow an object mounted on the innermost gimbal to remain vertical regardless of how its support structure moves. In the present context, a gimbal-type structure is used to enable deflection of a mirror in substantially all X-Y directions (i.e., 2D actuation) by electrostatic actuation.
The electrostatic actuation can be achieved in a couple of different ways.
The first that should be mentioned using what is referred to as "plate capacitor actuation". For a mirror that is suspended in e.g. a torsional one, there is thus arranged one or two electrodes under the mirror at points such that when a potential is applied to the electrode there will be an electric field between the mirror and the electrode, which causes an attraction towards the electrode, whereby the mirror will declined. The mirror can itself act as an electrode or electrode elements can be arranged on the mirrors.
According to the present invention, in a first aspect, the actuation potential is applied to the electrodes by arranging via structures extending through the substrate from its back. Thereby, there will be no need to provide routing structures in the same plane as the electrodes, which has the disadvantage that it takes up space, and can also be rather complicated from a manufacturing point of view.
In a second aspect, the actuation can be accomplished through "cam electrode structures". An example of an invention of such cam electrodes is shown in Fig. 4, applied to a deflectable micromirror.
As can be seen from Fig. 4, there are mating cam structures on the mirror and on the support structure, respectively. The cam electrodes on the support structure (actuating electrodes) are connected to via structures below the structure and extend through the support structure from its back, as in the example discussed above. Furthermore, these combs are arranged at different levels, i.e. they are manufactured in different component layers in the SOI disks used for the manufacture.
Thus, when a potential is applied to the actuating electrodes, the cam structure of the mirror will be pulled downwards, but in view of the fact that the "fingers" of the cams fit together in an alternating, interleaved manner, the deflection can be achieved more smoothly than in the case of electrodes the mirror. For example, it will be possible to manufacture more compact structures using the cam electrodes.
Fig. 4 schematically illustrates a gimbal hinge structure comprising both plate capacitor actuation and cam electrode actuation. Thus, a mirror 50 is supported by torsion elements 52 in a frame 54, which in turn is supported by torsion elements 56 mounted on a surrounding support structure 58.
Below the mirror 50, two electrode pairs 59a and 59b, respectively, are shown in shadow lines.
These electrodes are provided with vias which extend through the disc and which expose an end surface. When the electrodes 59a are activated, they will cause a deflection of the mirror in an inward direction (at the left part seen in the figure) relative to the plane of the drawing. Corresponding activation of the electrodes 59b will cause an inward deflection at the right part. Obviously, the opposite part will be deflected outwards.
For deflection in the other direction, two cam electrode structures 60a and 60b are provided. The fingers attached to the support structure will form actuating electrodes. Thus, when the actuating electrodes are activated, the gimbal frame 54 will deflect around its torsion threads 56 and cause the mirror to deflect correspondingly.
In another embodiment, the hinges are "hidden" under the mirrors, which has the advantage that the mirrors can be placed very tightly, i.e. one can obtain a very compact design. For certain light wavelengths, the mirrors may also often need to be coated with a suitable material. Such a reflective coating usually only needs to be present on the mirror surface itself, and not on the hinges and / or gimbal structures. With the concept of hidden hinges, the entire board can be coated. If the hinges are not hidden, a selective coating of the reflective material must be performed, e.g. using 'lift-off', shadow mask, stencil shadow mask and other techniques that are much more complicated and do not give as good a return.
To manufacture such hidden hinges, the process sequence will differ from that described above. Reference is made to Fig. 5.
The same basic process involving two SOI disks can be used, but the hinges are manufactured in the component layer DL1 in the first SOI disk, and the mirror and a pillar supporting the mirror are manufactured in the component layer in the second SOI disk. Once the SOI boards have been bonded together after the required structures have been fabricated in each board, a backside opening is made from the back of the carrier layer in the first SOI board to provide a free space in which the hinges can move during deflection.
Alternatively, an additional SOI disk is bonded to the structure. In this case, its component bearing is used to provide a spacer element to enable the mirror to move (deflect) as desired. The component bearing DLO is etched in this case to provide a recess which, when the disc is bonded, provides the space for movement.
The processes described above are also applicable to the provision of cam electrode structures, arranged in double axis mirror designs containing gimbal structures, even if they are not hidden structures.
For cam electrodes, an additional method is available, see Fig. 7. Namely, to accomplish this, one must perform a miracle under the hinge structures after the discs have been bonded together. In this case, the hinge structure is protected by an oxide layer and a silicon is made, whereby material is also removed from under the hinge in order thus to provide a free space for deflection. The carrier part of this further disc is removed by etching when the other disc (s) has been bonded.
权利要求:
Claims (12)
[1]
A layered microelectric / mechanical (MEMS) structure, comprising at least three conductive layers with insulating layers therebetween, and further comprising: a via (35, 36) in a first outer layer which via comprises an insulated (36) conductive bushing (35) through the layer; an electrically conductive plug (37) extending through the other layers and into the vial (35, 36) in the first outer layer to provide conductivity through the layers; and an insulating enclosure (38) surrounding said conductive plug in at least one selected layer of said other layers to insulate the plug from the material of the selected layer, and wherein the plug (37) is uninsulated from surrounding sheet material in at least one other layer.
[2]
A structure according to claim 1, wherein the conductive plug (37) is of metal or polysilicon or doped silicon, preferably polysilicon.
[3]
The structure of claim 1, wherein the number of layers is three.
[4]
The structure of claim 1, wherein the insulating enclosure (38) comprises insulating grooves (trenches) forming routing channels (39) within a layer so that the wire (35, 36) is located at a point on the disk and signals can be routed to another point in the layer (Fig. See).
[5]
A structure according to claim 1, comprising a cavity in any of the layers.
[6]
A method of manufacturing a structure according to claim 1, comprising the steps of providing a first SOI wafer having a via structure in the "handle" layer and extending therethrough and into the buried oxide layer; providing a second SOI disk; to bond the SGI disks together; removing the "handle" layer of the second SOI disk; Creating an insulating structure in the form of a trench which runs in a closed loop in one of the component layers of the two SOI disks, and which at least partially overlaps the via structure when the SOI disks are bonded together; making a hole through the component layer of the bonded SOI disks, which hole extends down the ivia structure; and filling the hole with conductive material, preferably polysilicon, to provide electrical connection.
[7]
A method according to claim 6, wherein the groove is at least partially filled with insulating material.
[8]
Device comprising at least one micromirror structure arranged on a substrate and comprising at least one mirror, which mirror is suspended in a cavity and is fixedly arranged at one end and can be bent off at the other end, and at least one electrostatic electrode for each mirror to effect deflection of the mirror (s), where the electrodes are connected to via structures extending through the substrate, the coupling between electrodes and via structures taking place by means of a layered microelectric / mechanical structure according to claim 5.
[9]
Device according to claim 8, wherein the mirror is suspended in the cavity by means of a first pair of torsion elements (52).
[10]
Device according to claim 8, wherein the torsion elements are arranged in opposite positions on the mirror.
[11]
A device according to claim 10, wherein the mirror is suspended in a frame (54).
[12]
Device according to claim 1 1, wherein the frame (54) is suspended in the cavity by means of a second pair of torsion elements (56) arranged perpendicular to the first pair of torsion elements (52).
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引用文献:
公开号 | 申请日 | 公开日 | 申请人 | 专利标题

JP3605846B2|1994-03-04|2004-12-22|オムロン株式会社|Capacitive acceleration sensor and capacitive pressure sensor|
US5535626A|1994-12-21|1996-07-16|Breed Technologies, Inc.|Sensor having direct-mounted sensing element|
US6201629B1|1997-08-27|2001-03-13|Microoptical Corporation|Torsional micro-mechanical mirror system|
JP3610247B2|1998-10-30|2005-01-12|京セラ株式会社|Wiring board|
US6716657B1|2000-05-26|2004-04-06|Agere Systems Inc|Method for interconnecting arrays of micromechanical devices|
US6431714B1|2000-10-10|2002-08-13|Nippon Telegraph And Telephone Corporation|Micro-mirror apparatus and production method therefor|
JP2002139680A|2000-10-31|2002-05-17|Pioneer Electronic Corp|Spatial optical modulator/demodulator and hologram recording reproducing device using the same|
JP2002307396A|2001-04-13|2002-10-23|Olympus Optical Co Ltd|Actuator|
GB2375185A|2001-05-04|2002-11-06|Kymata Ltd|Thick wafer for MEMS fabrication|
US6657759B2|2001-07-03|2003-12-02|Pts Corporation|Bistable micromirror with contactless stops|
JP4019847B2|2001-08-17|2007-12-12|株式会社デンソー|Functional device|
DE10205026C1|2002-02-07|2003-05-28|Bosch Gmbh Robert|Semiconductor substrate used for vertical integration of integrated circuits comprises a first conductor strip on its front side, and a region formed by insulating trenches and electrically insulated from the substrate|
US6972883B2|2002-02-15|2005-12-06|Ricoh Company, Ltd.|Vibration mirror, optical scanning device, and image forming using the same, method for making the same, and method for scanning image|
US20040004775A1|2002-07-08|2004-01-08|Turner Arthur Monroe|Resonant scanning mirror with inertially coupled activation|
US6723579B2|2002-07-12|2004-04-20|Analog Devices, Inc.|Semiconductor wafer comprising micro-machined components and a method for fabricating the semiconductor wafer|
JP3974470B2|2002-07-22|2007-09-12|株式会社東芝|Semiconductor device|
JP3779243B2|2002-07-31|2006-05-24|富士通株式会社|Semiconductor device and manufacturing method thereof|
US6638607B1|2002-10-30|2003-10-28|International Business Machines Corporation|Method and structure for producing Z-axis interconnection assembly of printed wiring board elements|
SE526366C3|2003-03-21|2005-10-26|Silex Microsystems Ab|Electrical connections in substrate|
JP4252889B2|2003-08-12|2009-04-08|富士通株式会社|Manufacturing method of microstructure|
US6897125B2|2003-09-17|2005-05-24|Intel Corporation|Methods of forming backside connections on a wafer stack|
US6862127B1|2003-11-01|2005-03-01|Fusao Ishii|High performance micromirror arrays and methods of manufacturing the same|
JP2005236220A|2004-02-23|2005-09-02|Dainippon Printing Co Ltd|Wiring substrate and its manufacturing method, and semiconductor package|
US7095545B2|2004-04-02|2006-08-22|Hewlett-Packard Development Company, L.P.|Microelectromechanical device with reset electrode|
JP2005305614A|2004-04-23|2005-11-04|Seiko Epson Corp|Method of manufacturing microstructure, microstructure, wave length variable light filter and micromirror|
US7390740B2|2004-09-02|2008-06-24|Micron Technology, Inc.|Sloped vias in a substrate, spring-like contacts, and methods of making|
US7344262B2|2004-09-29|2008-03-18|Lucent Technologies Inc.|MEMS mirror with tip or piston motion for use in adaptive optics|
EP2461200A1|2005-01-05|2012-06-06|Nippon Telegraph And Telephone Corporation|Mirror device|
CN100451725C|2005-01-05|2009-01-14|日本电信电话株式会社|Mirror device, mirror array, optical switch, and manufacturing method thereof|
JP4573664B2|2005-02-16|2010-11-04|富士通株式会社|Micro oscillating device and manufacturing method thereof|
CN101223633A|2005-05-18|2008-07-16|科隆科技公司|Micro-electro-mechanical transducers|
JP4760148B2|2005-06-07|2011-08-31|セイコーエプソン株式会社|Structure manufacturing method and structure|
US8354730B2|2005-08-26|2013-01-15|Hitachi, Ltd.|Manufacturing method of semiconductor device and semiconductor device|
US7382513B2|2005-10-13|2008-06-03|Miradia Inc.|Spatial light modulator with multi-layer landing structures|
JP2007180407A|2005-12-28|2007-07-12|Matsushita Electric Ind Co Ltd|Semiconductor device and manufacturing method therefor|
SE533308C2|2006-02-01|2010-08-24|Silex Microsystems Ab|Methods for manufacturing a starting substrate disk for semiconductor manufacturing, with disk-through connections|
WO2007110799A2|2006-03-27|2007-10-04|Philips Intellectual Property & Standards Gmbh|Low ohmic through substrate interconnection for semiconductor carriers|
US20080006850A1|2006-07-10|2008-01-10|Innovative Micro Technology|System and method for forming through wafer vias using reverse pulse plating|
TWI320944B|2006-10-23|2010-02-21|Touch Micro System Tech|Method for fabricating flow channel capable of balancing air pressure|
JP4279308B2|2006-11-02|2009-06-17|アルプス電気株式会社|Variable capacitance element and variable capacitance device|
JP5052148B2|2007-01-26|2012-10-17|パナソニック株式会社|Semiconductor structure and manufacturing method thereof|
JP4364249B2|2007-02-16|2009-11-11|富士通株式会社|Micromirror device and manufacturing method thereof|
JP4792143B2|2007-02-22|2011-10-12|株式会社デンソー|Semiconductor device and manufacturing method thereof|US7863752B2|2009-02-25|2011-01-04|Capella Photonics, Inc.|MEMS device with integrated via and spacer|
TWI434803B|2010-06-30|2014-04-21|Ind Tech Res Inst|Apparatus integrating microelectromechanical system device with circuit chip and methods for fabricating the same|
US9036231B2|2010-10-20|2015-05-19|Tiansheng ZHOU|Micro-electro-mechanical systems micromirrors and micromirror arrays|
TW201243287A|2011-04-28|2012-11-01|Hon Hai Prec Ind Co Ltd|Laser range finder|
US8754338B2|2011-05-28|2014-06-17|Banpil Photonics, Inc.|On-chip interconnects with reduced capacitance and method of afbrication|
US20120306076A1|2011-05-31|2012-12-06|ISC8 Inc.|Semiconductor Micro-Connector With Through-Hole Via and a Method for Making the Same|
FR2977884B1|2011-07-12|2016-01-29|Commissariat Energie Atomique|METHOD FOR PRODUCING A SUSPENDED MEMBRANE STRUCTURE AND ELECTRODE BURNING|
KR102006506B1|2011-07-15|2019-08-01|가부시키가이샤 큐럭스|Organic electroluminescence element and compound used therein|
AU2011374985C1|2011-08-16|2015-11-12|Empire Technology Development Llc|Techniques for generating audio signals|
US9385634B2|2012-01-26|2016-07-05|Tiansheng ZHOU|Rotational type of MEMS electrostatic actuator|
DE102012210480A1|2012-06-21|2013-12-24|Robert Bosch Gmbh|A method of manufacturing a device having an electrical via|
ITTO20130031A1|2013-01-14|2014-07-15|St Microelectronics Srl|MICROMECHANICAL MIRROR STRUCTURE AND ITS MANUFACTURING PROCEDURE|
US9335544B2|2013-03-15|2016-05-10|Rit Wireless Ltd.|Electrostatically steerable actuator|
DE102013216901A1|2013-08-26|2015-02-26|Robert Bosch Gmbh|Micromechanical component and method for producing a micromechanical component|
US10284961B2|2014-02-08|2019-05-07|Empire Technology Development Llc|MEMS-based structure for pico speaker|
US10123126B2|2014-02-08|2018-11-06|Empire Technology Development Llc|MEMS-based audio speaker system using single sideband modulation|
US9913048B2|2014-02-08|2018-03-06|Empire Technology Development Llc|MEMS-based audio speaker system with modulation element|
WO2015119629A2|2014-02-08|2015-08-13|Empire Technology Development Llc|Mems dual comb drive|
JP5952850B2|2014-03-31|2016-07-13|株式会社豊田中央研究所|MEMS device|
DE102014210986A1|2014-06-10|2015-12-17|Robert Bosch Gmbh|Micromechanical layer arrangement|
JP6492893B2|2015-04-01|2019-04-03|セイコーエプソン株式会社|Electro-optical device, method of manufacturing electro-optical device, and electronic apparatus|
KR101688724B1|2015-04-08|2016-12-21|주식회사 스탠딩에그|Method of manufacturing mems device|
TWI638419B|2016-04-18|2018-10-11|村田製作所股份有限公司|A scanning mirror device and a method for manufacturing it|
CN106094064B|2016-06-08|2017-12-05|无锡微奥科技有限公司|A kind of thermal drivers MEMS micromirror array device and its manufacture method|
US9929290B2|2016-06-20|2018-03-27|Globalfoundries Inc.|Electrical and optical via connections on a same chip|
CN106783801B|2016-11-18|2020-02-14|浙江大学|High-density SOI packaging substrate and preparation method thereof|
US10204873B2|2017-05-08|2019-02-12|Infineon Technologies Americas Corp.|Breakable substrate for semiconductor die|
法律状态:
优先权:
申请号 | 申请日 | 专利标题
SE0802663A|SE533992C2|2008-12-23|2008-12-23|Electrical connection in a structure with insulating and conductive bearings|SE0802663A| SE533992C2|2008-12-23|2008-12-23|Electrical connection in a structure with insulating and conductive bearings|
PCT/SE2009/051496| WO2010074649A1|2008-12-23|2009-12-23|Via structure and method thereof|
KR1020117014438A| KR101659638B1|2008-12-23|2009-12-23|Layered mems structure and method thereof|
EP11174115A| EP2381289A1|2008-12-23|2009-12-23|MEMS device|
EP11174118.7A| EP2383601B1|2008-12-23|2009-12-23|Semiconductor device comprising a cavity having a vent hole|
EP09835356.8A| EP2377154B1|2008-12-23|2009-12-23|Via structure and method thereof|
KR1020167001911A| KR101710334B1|2008-12-23|2009-12-23|Device comprising a deflectable structure|
JP2011543475A| JP5701772B2|2008-12-23|2009-12-23|Via structure and manufacturing method thereof|
CN200980157697.0A| CN102362346B|2008-12-23|2009-12-23|Via structure and method thereof|
US13/141,609| US8592981B2|2008-12-23|2009-12-23|Via structure and method thereof|
US13/166,621| US8630033B2|2008-12-23|2011-06-22|Via structure and method thereof|
US13/193,313| US8729713B2|2008-12-23|2011-07-28|Via structure and method thereof|
US14/073,307| US9448401B2|2008-12-23|2013-11-06|Via structure and method thereof|
JP2015029296A| JP2015146018A|2008-12-23|2015-02-18|Device comprising deflectable micromirror|
JP2015029295A| JP6093788B2|2008-12-23|2015-02-18|Method of making a device, semiconductor device and precursor structure|
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